| PART |
Description |
Maker |
| BWR-12/125-D12 BWR-12/125-D48 BWR-5/250-D48 BWR-15 |
Rad-hard hex buffer/converter
Rad-hard triple 3-input NOR gate
Rad-hard quad D-type flip flop with clear
Rad-hard 4 bit synchronous up/down counters 型DC - DC电压转换
|
Ohmite Mfg. Co.
|
| M54HC174D1 M54HC174D M54HC174K M54HC174K1 M54HC174 |
RAD-HARD HEX D-TYPE FLIP FLOP WITH CLEAR
|
STMicroelectronics
|
| M54HC574D1 M54HC574 M54HC574D M54HC574K1 |
RAD-HARD OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING
|
STMicroelectronics
|
| 54VCXH16237411 |
Rad hard low voltage CMOS 16-bit d-type flip-flop (3-state) with 3.6 V tolerant inputs and outputs
|
STMicroelectronics
|
| CD40174BMS FN3359 |
CMOS Hex ‘D?Type Flip-Flop
CMOS Hex ‘D’-Type Flip-Flop
From old datasheet system
CMOS Hex ??Type Flip-Flop
CMOS Hex D-Type Flip-Flop
D-Type Flip Flop, Hex, Rad-Hard, CMOS, Logic
|
INTERSIL[Intersil Corporation]
|
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| BWR-12/335-D5A BWR-5/700-D5A BWR-5/700-D48A BWR-15 |
12V 7-10W, dual output DC/DC converter
DC-DC Converter, (4.7 to 7.25) V to (-12|12) V
Rad-hard 4 to 16 line decoder/latch
Rad-hard 3 to 8 line decoder latch
Rad-hard octal bus buffer with 3 state outputs (non inverted) 型DC - DC电压转换
Rad-hard 8-input NAND gate 型DC - DC电压转换
Rad-hard octal bus buffer with 3 state outputs (inverted) 型DC - DC电压转换
|
Datel, Inc.
Air Cost Control
RECOM Electronic GmbH
Electronic Theatre Controls, Inc.
|
| HS-22620RH HS0-22620RH-Q HS9-22620RH HS9-22620RH/P |
Rad Hard Dual/ Wideband/ High Input Impedance Uncompensated Operational Amplifier
Rad Hard Dual, Wideband, High Input Impedance Uncompensated Operational
Amplifier(抗辐射宽带、高非补偿输入阻抗运算放大器)
Rad Hard Dual, Wideband, High Input Impedance Uncompensated Operational Amplifier DUAL OP-AMP, 6000 uV OFFSET-MAX, 100 MHz BAND WIDTH, UUC18
|
Intersil Corporation
Intersil, Corp.
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| MC74HC76 MC74HC76D MC74HC76N ON1498 |
From old datasheet system
DUAL JK FLIP-FLOP WITH SER AND RESET
Dual JK Flip-Flop With Set and Reset
|
MOTOROLA[Motorola, Inc]
ON Semi
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
